33#define _AVR_POWER_H_ 1
39#ifndef __ATTR_ALWAYS_INLINE__
40#define __ATTR_ALWAYS_INLINE__ __inline__ __attribute__((__always_inline__))
453#if defined(__AVR_HAVE_PRR_PRADC)
454#define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
455#define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
458#if defined(__AVR_HAVE_PRR_PRCAN)
459#define power_can_enable() (PRR &= (uint8_t)~(1 << PRCAN))
460#define power_can_disable() (PRR |= (uint8_t)(1 << PRCAN))
463#if defined(__AVR_HAVE_PRR_PRLCD)
464#define power_lcd_enable() (PRR &= (uint8_t)~(1 << PRLCD))
465#define power_lcd_disable() (PRR |= (uint8_t)(1 << PRLCD))
468#if defined(__AVR_HAVE_PRR_PRLIN)
469#define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
470#define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
473#if defined(__AVR_HAVE_PRR_PRPSC)
474#define power_psc_enable() (PRR &= (uint8_t)~(1 << PRPSC))
475#define power_psc_disable() (PRR |= (uint8_t)(1 << PRPSC))
478#if defined(__AVR_HAVE_PRR_PRPSC0)
479#define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
480#define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
483#if defined(__AVR_HAVE_PRR_PRPSC1)
484#define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
485#define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
488#if defined(__AVR_HAVE_PRR_PRPSC2)
489#define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
490#define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
493#if defined(__AVR_HAVE_PRR_PRPSCR)
494#define power_pscr_enable() (PRR &= (uint8_t)~(1 << PRPSCR))
495#define power_pscr_disable() (PRR |= (uint8_t)(1 << PRPSCR))
498#if defined(__AVR_HAVE_PRR_PRSPI)
499#define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
500#define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
503#if defined(__AVR_HAVE_PRR_PRTIM0)
504#define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
505#define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
508#if defined(__AVR_HAVE_PRR_PRTIM1)
509#define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
510#define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
513#if defined(__AVR_HAVE_PRR_PRTIM2)
514#define power_timer2_enable() (PRR &= (uint8_t)~(1 << PRTIM2))
515#define power_timer2_disable() (PRR |= (uint8_t)(1 << PRTIM2))
518#if defined(__AVR_HAVE_PRR_PRTWI)
519#define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
520#define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
523#if defined(__AVR_HAVE_PRR_PRUSART)
524#define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART))
525#define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART))
528#if defined(__AVR_HAVE_PRR_PRUSART0)
529#define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
530#define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
533#if defined(__AVR_HAVE_PRR_PRUSART1)
534#define power_usart1_enable() (PRR &= (uint8_t)~(1 << PRUSART1))
535#define power_usart1_disable() (PRR |= (uint8_t)(1 << PRUSART1))
538#if defined(__AVR_HAVE_PRR_PRUSI)
539#define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
540#define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
543#if defined(__AVR_HAVE_PRR0_PRADC)
544#define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
545#define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
548#if defined(__AVR_HAVE_PRR0_PRC0)
549#define power_clock_output_enable() (PRR0 &= (uint8_t)~(1 << PRCO))
550#define power_clock_output_disable() (PRR0 |= (uint8_t)(1 << PRCO))
553#if defined(__AVR_HAVE_PRR0_PRCRC)
554#define power_crc_enable() (PRR0 &= (uint8_t)~(1 << PRCRC))
555#define power_crc_disable() (PRR0 |= (uint8_t)(1 << PRCRC))
558#if defined(__AVR_HAVE_PRR0_PRCU)
559#define power_crypto_enable() (PRR0 &= (uint8_t)~(1 << PRCU))
560#define power_crypto_disable() (PRR0 |= (uint8_t)(1 << PRCU))
563#if defined(__AVR_HAVE_PRR0_PRDS)
564#define power_irdriver_enable() (PRR0 &= (uint8_t)~(1 << PRDS))
565#define power_irdriver_disable() (PRR0 |= (uint8_t)(1 << PRDS))
568#if defined(__AVR_HAVE_PRR0_PRLFR)
569#define power_lfreceiver_enable() (PRR0 &= (uint8_t)~(1 << PRLFR))
570#define power_lfreceiver_disable() (PRR0 |= (uint8_t)(1 << PRLFR))
573#if defined(__AVR_HAVE_PRR0_PRLFRS)
574#define power_lfrs_enable() (PRR0 &= (uint8_t)~(1 << PRLFRS))
575#define power_lfrs_disable() (PRR0 |= (uint8_t)(1 << PRLFRS))
578#if defined(__AVR_HAVE_PRR0_PRLIN)
579#define power_lin_enable() (PRR0 &= (uint8_t)~(1 << PRLIN))
580#define power_lin_disable() (PRR0 |= (uint8_t)(1 << PRLIN))
583#if defined(__AVR_HAVE_PRR0_PRPGA)
584#define power_pga_enable() (PRR0 &= (uint8_t)~(1 << PRPGA))
585#define power_pga_disable() (PRR0 |= (uint8_t)(1 << PRPGA))
588#if defined(__AVR_HAVE_PRR0_PRRXDC)
589#define power_receive_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRRXDC))
590#define power_receive_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRRXDC))
593#if defined(__AVR_HAVE_PRR0_PRSPI)
594#define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
595#define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
598#if defined(__AVR_HAVE_PRR0_PRT0)
599#define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRT0))
600#define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRT0))
603#if defined(__AVR_HAVE_PRR0_PRTIM0)
604#define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
605#define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
608#if defined(__AVR_HAVE_PRR0_PRT1)
609#define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRT1))
610#define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRT1))
613#if defined(__AVR_HAVE_PRR0_PRTIM1)
614#define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
615#define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
618#if defined(__AVR_HAVE_PRR0_PRT2)
619#define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRT2))
620#define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRT2))
623#if defined(__AVR_HAVE_PRR0_PRTIM2)
624#define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
625#define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
628#if defined(__AVR_HAVE_PRR0_PRT3)
629#define power_timer3_enable() (PRR0 &= (uint8_t)~(1 << PRT3))
630#define power_timer3_disable() (PRR0 |= (uint8_t)(1 << PRT3))
633#if defined(__AVR_HAVE_PRR0_PRTM)
634#define power_timermodulator_enable() (PRR0 &= (uint8_t)~(1 << PRTM))
635#define power_timermodulator_disable() (PRR0 |= (uint8_t)(1 << PRTM))
638#if defined(__AVR_HAVE_PRR0_PRTWI)
639#define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
640#define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
643#if defined(__AVR_HAVE_PRR0_PRTWI1)
644#define power_twi1_enable() (PRR0 &= (uint8_t)~(1 << PRTWI1))
645#define power_twi1_disable() (PRR0 |= (uint8_t)(1 << PRTWI1))
648#if defined(__AVR_HAVE_PRR0_PRTXDC)
649#define power_transmit_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRTXDC))
650#define power_transmit_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRTXDC))
653#if defined(__AVR_HAVE_PRR0_PRUSART0)
654#define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
655#define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
658#if defined(__AVR_HAVE_PRR0_PRUSART1)
659#define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
660#define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
663#if defined(__AVR_HAVE_PRR0_PRVADC)
664#define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
665#define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
668#if defined(__AVR_HAVE_PRR0_PRVM)
669#define power_voltage_monitor_enable() (PRR0 &= (uint8_t)~(1 << PRVM))
670#define power_voltage_monitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
673#if defined(__AVR_HAVE_PRR0_PRVRM)
674#define power_vrm_enable() (PRR0 &= (uint8_t)~(1 << PRVRM))
675#define power_vrm_disable() (PRR0 |= (uint8_t)(1 << PRVRM))
678#if defined(__AVR_HAVE_PRR1_PRAES)
679#define power_aes_enable() (PRR1 &= (uint8_t)~(1 << PRAES))
680#define power_aes_disable() (PRR1 |= (uint8_t)(1 << PRAES))
683#if defined(__AVR_HAVE_PRR1_PRCI)
684#define power_cinterface_enable() (PRR1 &= (uint8_t)~(1 << PRCI))
685#define power_cinterface_disable() (PRR1 |= (uint8_t)(1 << PRCI))
688#if defined(__AVR_HAVE_PRR1_PRHSSPI)
689#define power_hsspi_enable() (PRR1 &= (uint8_t)~(1 << PRHSSPI))
690#define power_hsspi_disable() (PRR1 |= (uint8_t)(1 << PRHSSPI))
693#if defined(__AVR_HAVE_PRR1_PRKB)
694#define power_kb_enable() (PRR1 &= (uint8_t)~(1 << PRKB))
695#define power_kb_disable() (PRR1 |= (uint8_t)(1 << PRKB))
698#if defined(__AVR_HAVE_PRR1_PRLFPH)
699#define power_lfph_enable() (PRR1 &= (uint8_t)~(1 << PRLFPH))
700#define power_lfph_disable() (PRR1 |= (uint8_t)(1 << PRLFPH))
703#if defined(__AVR_HAVE_PRR1_PRLFR)
704#define power_lfreceiver_enable() (PRR1 &= (uint8_t)~(1 << PRLFR))
705#define power_lfreceiver_disable() (PRR1 |= (uint8_t)(1 << PRLFR))
708#if defined(__AVR_HAVE_PRR1_PRLFTP)
709#define power_lftp_enable() (PRR1 &= (uint8_t)~(1 << PRLFTP))
710#define power_lftp_disable() (PRR1 |= (uint8_t)(1 << PRLFTP))
713#if defined(__AVR_HAVE_PRR1_PRSCI)
714#define power_sci_enable() (PRR1 &= (uint8_t)~(1 << PRSCI))
715#define power_sci_disable() (PRR1 |= (uint8_t)(1 << PRSCI))
718#if defined(__AVR_HAVE_PRR1_PRSPI)
719#define power_spi_enable() (PRR1 &= (uint8_t)~(1 << PRSPI))
720#define power_spi_disable() (PRR1 |= (uint8_t)(1 << PRSPI))
723#if defined(__AVR_HAVE_PRR1_PRT1)
724#define power_timer1_enable() (PRR1 &= (uint8_t)~(1 << PRT1))
725#define power_timer1_disable() (PRR1 |= (uint8_t)(1 << PRT1))
728#if defined(__AVR_HAVE_PRR1_PRT2)
729#define power_timer2_enable() (PRR1 &= (uint8_t)~(1 << PRT2))
730#define power_timer2_disable() (PRR1 |= (uint8_t)(1 << PRT2))
733#if defined(__AVR_HAVE_PRR1_PRT3)
734#define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRT3))
735#define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRT3))
738#if defined(__AVR_HAVE_PRR1_PRT4)
739#define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRT4))
740#define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRT4))
743#if defined(__AVR_HAVE_PRR1_PRT5)
744#define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRT5))
745#define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRT5))
748#if defined(__AVR_HAVE_PRR1_PRTIM3)
749#define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
750#define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
753#if defined(__AVR_HAVE_PRR1_PRTIM4)
754#define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
755#define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
758#if defined(__AVR_HAVE_PRR1_PRTIM5)
759#define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
760#define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
763#if defined(__AVR_HAVE_PRR1_PRTRX24)
764#define power_transceiver_enable() (PRR1 &= (uint8_t)~(1 << PRTRX24))
765#define power_transceiver_disable() (PRR1 |= (uint8_t)(1 << PRTRX24))
768#if defined(__AVR_HAVE_PRR1_PRUSART1)
769#define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
770#define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
773#if defined(__AVR_HAVE_PRR1_PRUSART2)
774#define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2))
775#define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2))
778#if defined(__AVR_HAVE_PRR1_PRUSART3)
779#define power_usart3_enable() (PRR1 &= (uint8_t)~(1 << PRUSART3))
780#define power_usart3_disable() (PRR1 |= (uint8_t)(1 << PRUSART3))
783#if defined(__AVR_HAVE_PRR1_PRUSB)
784#define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
785#define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
788#if defined(__AVR_HAVE_PRR1_PRUSBH)
789#define power_usbh_enable() (PRR1 &= (uint8_t)~(1 << PRUSBH))
790#define power_usbh_disable() (PRR1 |= (uint8_t)(1 << PRUSBH))
793#if defined(__AVR_HAVE_PRR2_PRDF)
794#define power_data_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRDF))
795#define power_data_fifo_disable() (PRR2 |= (uint8_t)(1 << PRDF))
798#if defined(__AVR_HAVE_PRR2_PRIDS)
799#define power_id_scan_enable() (PRR2 &= (uint8_t)~(1 << PRIDS))
800#define power_id_scan_disable() (PRR2 |= (uint8_t)(1 << PRIDS))
803#if defined(__AVR_HAVE_PRR2_PRRAM0)
804#define power_ram0_enable() (PRR2 &= (uint8_t)~(1 << PRRAM0))
805#define power_ram0_disable() (PRR2 |= (uint8_t)(1 << PRRAM0))
808#if defined(__AVR_HAVE_PRR2_PRRAM1)
809#define power_ram1_enable() (PRR2 &= (uint8_t)~(1 << PRRAM1))
810#define power_ram1_disable() (PRR2 |= (uint8_t)(1 << PRRAM1))
813#if defined(__AVR_HAVE_PRR2_PRRAM2)
814#define power_ram2_enable() (PRR2 &= (uint8_t)~(1 << PRRAM2))
815#define power_ram2_disable() (PRR2 |= (uint8_t)(1 << PRRAM2))
818#if defined(__AVR_HAVE_PRR2_PRRAM3)
819#define power_ram3_enable() (PRR2 &= (uint8_t)~(1 << PRRAM3))
820#define power_ram3_disable() (PRR2 |= (uint8_t)(1 << PRRAM3))
823#if defined(__AVR_HAVE_PRR2_PRRS)
824#define power_rssi_buffer_enable() (PRR2 &= (uint8_t)~(1 << PRRS))
825#define power_rssi_buffer_disable() (PRR2 |= (uint8_t)(1 << PRRS))
828#if defined(__AVR_HAVE_PRR2_PRSF)
829#define power_preamble_rssi_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRSF))
830#define power_preamble_rssi_fifo_disable() (PRR2 |= (uint8_t)(1 << PRSF))
833#if defined(__AVR_HAVE_PRR2_PRSPI2)
834#define power_spi2_enable() (PRR2 &= (uint8_t)~(1 << PRSPI2))
835#define power_spi2_disable() (PRR2 |= (uint8_t)(1 << PRSPI2))
838#if defined(__AVR_HAVE_PRR2_PRSSM)
839#define power_sequencer_state_machine_enable() (PRR2 &= (uint8_t)~(1 << PRSSM))
840#define power_sequencer_state_machine_disable() (PRR2 |= (uint8_t)(1 << PRSSM))
843#if defined(__AVR_HAVE_PRR2_PRTM)
844#define power_tx_modulator_enable() (PRR2 &= (uint8_t)~(1 << PRTM))
845#define power_tx_modulator_disable() (PRR2 |= (uint8_t)(1 << PRTM))
848#if defined(__AVR_HAVE_PRR2_PRTWI2)
849#define power_twi2_enable() (PRR2 &= (uint8_t)~(1 << PRTWI2))
850#define power_twi2_disable() (PRR2 |= (uint8_t)(1 << PRTWI2))
853#if defined(__AVR_HAVE_PRR2_PRXA)
854#define power_rx_buffer_A_enable() (PRR2 &= (uint8_t)~(1 << PRXA))
855#define power_rx_buffer_A_disable() (PRR2 |= (uint8_t)(1 << PRXA))
858#if defined(__AVR_HAVE_PRR2_PRXB)
859#define power_rx_buffer_B_enable() (PRR2 &= (uint8_t)~(1 << PRXB))
860#define power_rx_buffer_B_disable() (PRR2 |= (uint8_t)(1 << PRXB))
863#if defined(__AVR_HAVE_PRGEN_AES)
864#define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
865#define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
868#if defined(__AVR_HAVE_PRGEN_DMA)
869#define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
870#define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
873#if defined(__AVR_HAVE_PRGEN_EBI)
874#define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
875#define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
878#if defined(__AVR_HAVE_PRGEN_EDMA)
879#define power_edma_enable() (PR_PRGEN &= (uint8_t)~(PR_EDMA_bm))
880#define power_edma_disable() (PR_PRGEN |= (uint8_t)PR_EDMA_bm)
883#if defined(__AVR_HAVE_PRGEN_EVSYS)
884#define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
885#define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
888#if defined(__AVR_HAVE_PRGEN_LCD)
889#define power_lcd_enable() (PR_PRGEN &= (uint8_t)~(PR_LCD_bm))
890#define power_lcd_disable() (PR_PRGEN |= (uint8_t)PR_LCD_bm)
893#if defined(__AVR_HAVE_PRGEN_RTC)
894#define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
895#define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
898#if defined(__AVR_HAVE_PRGEN_USB)
899#define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
900#define power_usb_disable() (PR_PRGEN &= (uint8_t)(PR_USB_bm))
903#if defined(__AVR_HAVE_PRGEN_XCL)
904#define power_xcl_enable() (PR_PRGEN &= (uint8_t)~(PR_XCL_bm))
905#define power_xcl_disable() (PR_PRGEN |= (uint8_t)PR_XCL_bm)
908#if defined(__AVR_HAVE_PRPA_AC)
909#define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
910#define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
913#if defined(__AVR_HAVE_PRPA_ADC)
914#define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
915#define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
918#if defined(__AVR_HAVE_PRPA_DAC)
919#define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
920#define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
923#if defined(__AVR_HAVE_PRPB_AC)
924#define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
925#define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
928#if defined(__AVR_HAVE_PRPB_ADC)
929#define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
930#define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
933#if defined(__AVR_HAVE_PRPB_DAC)
934#define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
935#define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
938#if defined(__AVR_HAVE_PRPC_HIRES)
939#define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
940#define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
943#if defined(__AVR_HAVE_PRPC_SPI)
944#define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
945#define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
948#if defined(__AVR_HAVE_PRPC_TC0)
949#define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
950#define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
953#if defined(__AVR_HAVE_PRPC_TC1)
954#define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
955#define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
958#if defined(__AVR_HAVE_PRPC_TC4)
959#define power_tc4c_enable() (PR_PRPC &= (uint8_t)~(PR_TC4_bm))
960#define power_tc4c_disable() (PR_PRPC |= (uint8_t)PR_TC4_bm)
963#if defined(__AVR_HAVE_PRPC_TC5)
964#define power_tc5c_enable() (PR_PRPC &= (uint8_t)~(PR_TC5_bm))
965#define power_tc5c_disable() (PR_PRPC |= (uint8_t)PR_TC5_bm)
968#if defined(__AVR_HAVE_PRPC_TWI)
969#define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
970#define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
973#if defined(__AVR_HAVE_PRPC_USART0)
974#define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
975#define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
978#if defined(__AVR_HAVE_PRPC_USART1)
979#define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
980#define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
983#if defined(__AVR_HAVE_PRPD_HIRES)
984#define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
985#define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm)
988#if defined(__AVR_HAVE_PRPD_SPI)
989#define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
990#define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
993#if defined(__AVR_HAVE_PRPD_TC0)
994#define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
995#define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
998#if defined(__AVR_HAVE_PRPD_TC1)
999#define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
1000#define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm)
1003#if defined(__AVR_HAVE_PRPD_TC5)
1004#define power_tc5d_enable() (PR_PRPD &= (uint8_t)~(PR_TC5_bm))
1005#define power_tc5d_disable() (PR_PRPD |= (uint8_t)PR_TC5_bm)
1008#if defined(__AVR_HAVE_PRPD_TWI)
1009#define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
1010#define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm)
1013#if defined(__AVR_HAVE_PRPD_USART0)
1014#define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1015#define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1018#if defined(__AVR_HAVE_PRPD_USART1)
1019#define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
1020#define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
1023#if defined(__AVR_HAVE_PRPE_HIRES)
1024#define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
1025#define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm)
1028#if defined(__AVR_HAVE_PRPE_SPI)
1029#define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
1030#define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm)
1033#if defined(__AVR_HAVE_PRPE_TC0)
1034#define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1035#define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1038#if defined(__AVR_HAVE_PRPE_TC1)
1039#define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
1040#define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm)
1043#if defined(__AVR_HAVE_PRPE_TWI)
1044#define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1045#define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1048#if defined(__AVR_HAVE_PRPE_USART0)
1049#define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1050#define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1053#if defined(__AVR_HAVE_PRPE_USART1)
1054#define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
1055#define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
1058#if defined(__AVR_HAVE_PRPF_HIRES)
1059#define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
1060#define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm)
1063#if defined(__AVR_HAVE_PRPF_SPI)
1064#define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
1065#define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm)
1068#if defined(__AVR_HAVE_PRPF_TC0)
1069#define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1070#define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1073#if defined(__AVR_HAVE_PRPF_TC1)
1074#define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
1075#define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm)
1078#if defined(__AVR_HAVE_PRPF_TWI)
1079#define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
1080#define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm)
1083#if defined(__AVR_HAVE_PRPF_USART0)
1084#define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1085#define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1088#if defined(__AVR_HAVE_PRPF_USART1)
1089#define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
1090#define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
1101static __ATTR_ALWAYS_INLINE__
void __power_all_enable()
1103#ifdef __AVR_HAVE_PRR
1104 PRR &= (
uint8_t)~(__AVR_HAVE_PRR);
1107#ifdef __AVR_HAVE_PRR0
1108 PRR0 &= (
uint8_t)~(__AVR_HAVE_PRR0);
1111#ifdef __AVR_HAVE_PRR1
1112 PRR1 &= (
uint8_t)~(__AVR_HAVE_PRR1);
1115#ifdef __AVR_HAVE_PRR2
1116 PRR2 &= (
uint8_t)~(__AVR_HAVE_PRR2);
1119#ifdef __AVR_HAVE_PRGEN
1120 PR_PRGEN &= (
uint8_t)~(__AVR_HAVE_PRGEN);
1123#ifdef __AVR_HAVE_PRPA
1124 PR_PRPA &= (
uint8_t)~(__AVR_HAVE_PRPA);
1127#ifdef __AVR_HAVE_PRPB
1128 PR_PRPB &= (
uint8_t)~(__AVR_HAVE_PRPB);
1131#ifdef __AVR_HAVE_PRPC
1132 PR_PRPC &= (
uint8_t)~(__AVR_HAVE_PRPC);
1135#ifdef __AVR_HAVE_PRPD
1136 PR_PRPD &= (
uint8_t)~(__AVR_HAVE_PRPD);
1139#ifdef __AVR_HAVE_PRPE
1140 PR_PRPE &= (
uint8_t)~(__AVR_HAVE_PRPE);
1143#ifdef __AVR_HAVE_PRPF
1144 PR_PRPF &= (
uint8_t)~(__AVR_HAVE_PRPF);
1157static __ATTR_ALWAYS_INLINE__
void __power_all_disable()
1159#ifdef __AVR_HAVE_PRR
1160 PRR |= (
uint8_t)(__AVR_HAVE_PRR);
1163#ifdef __AVR_HAVE_PRR0
1164 PRR0 |= (
uint8_t)(__AVR_HAVE_PRR0);
1167#ifdef __AVR_HAVE_PRR1
1168 PRR1 |= (
uint8_t)(__AVR_HAVE_PRR1);
1171#ifdef __AVR_HAVE_PRR2
1172 PRR2 |= (
uint8_t)(__AVR_HAVE_PRR2);
1175#ifdef __AVR_HAVE_PRGEN
1176 PR_PRGEN |= (
uint8_t)(__AVR_HAVE_PRGEN);
1179#ifdef __AVR_HAVE_PRPA
1180 PR_PRPA |= (
uint8_t)(__AVR_HAVE_PRPA);
1183#ifdef __AVR_HAVE_PRPB
1184 PR_PRPB |= (
uint8_t)(__AVR_HAVE_PRPB);
1187#ifdef __AVR_HAVE_PRPC
1188 PR_PRPC |= (
uint8_t)(__AVR_HAVE_PRPC);
1191#ifdef __AVR_HAVE_PRPD
1192 PR_PRPD |= (
uint8_t)(__AVR_HAVE_PRPD);
1195#ifdef __AVR_HAVE_PRPE
1196 PR_PRPE |= (
uint8_t)(__AVR_HAVE_PRPE);
1199#ifdef __AVR_HAVE_PRPF
1200 PR_PRPF |= (
uint8_t)(__AVR_HAVE_PRPF);
1206#ifndef power_all_enable
1207#define power_all_enable() __power_all_enable()
1210#ifndef power_all_disable
1211#define power_all_disable() __power_all_disable()
1216#if defined(__DOXYGEN__) \
1217|| defined(__AVR_AT90CAN32__) \
1218|| defined(__AVR_AT90CAN64__) \
1219|| defined(__AVR_AT90CAN128__) \
1220|| defined(__AVR_AT90PWM1__) \
1221|| defined(__AVR_AT90PWM2__) \
1222|| defined(__AVR_AT90PWM2B__) \
1223|| defined(__AVR_AT90PWM3__) \
1224|| defined(__AVR_AT90PWM3B__) \
1225|| defined(__AVR_AT90PWM81__) \
1226|| defined(__AVR_AT90PWM161__) \
1227|| defined(__AVR_AT90PWM216__) \
1228|| defined(__AVR_AT90PWM316__) \
1229|| defined(__AVR_AT90SCR100__) \
1230|| defined(__AVR_AT90USB646__) \
1231|| defined(__AVR_AT90USB647__) \
1232|| defined(__AVR_AT90USB82__) \
1233|| defined(__AVR_AT90USB1286__) \
1234|| defined(__AVR_AT90USB1287__) \
1235|| defined(__AVR_AT90USB162__) \
1236|| defined(__AVR_ATA5505__) \
1237|| defined(__AVR_ATA5272__) \
1238|| defined(__AVR_ATmega1280__) \
1239|| defined(__AVR_ATmega1281__) \
1240|| defined(__AVR_ATmega1284__) \
1241|| defined(__AVR_ATmega128RFA1__) \
1242|| defined(__AVR_ATmega1284RFR2__) \
1243|| defined(__AVR_ATmega128RFR2__) \
1244|| defined(__AVR_ATmega1284P__) \
1245|| defined(__AVR_ATmega162__) \
1246|| defined(__AVR_ATmega164A__) \
1247|| defined(__AVR_ATmega164P__) \
1248|| defined(__AVR_ATmega164PA__) \
1249|| defined(__AVR_ATmega165__) \
1250|| defined(__AVR_ATmega165A__) \
1251|| defined(__AVR_ATmega165P__) \
1252|| defined(__AVR_ATmega165PA__) \
1253|| defined(__AVR_ATmega168__) \
1254|| defined(__AVR_ATmega168P__) \
1255|| defined(__AVR_ATmega168A__) \
1256|| defined(__AVR_ATmega168PA__) \
1257|| defined(__AVR_ATmega168PB__) \
1258|| defined(__AVR_ATmega169__) \
1259|| defined(__AVR_ATmega169A__) \
1260|| defined(__AVR_ATmega169P__) \
1261|| defined(__AVR_ATmega169PA__) \
1262|| defined(__AVR_ATmega16M1__) \
1263|| defined(__AVR_ATmega16U2__) \
1264|| defined(__AVR_ATmega16U4__) \
1265|| defined(__AVR_ATmega2560__) \
1266|| defined(__AVR_ATmega2561__) \
1267|| defined(__AVR_ATmega2564RFR2__) \
1268|| defined(__AVR_ATmega256RFR2__) \
1269|| defined(__AVR_ATmega324A__) \
1270|| defined(__AVR_ATmega324P__) \
1271|| defined(__AVR_ATmega324PA__) \
1272|| defined(__AVR_ATmega324PB__) \
1273|| defined(__AVR_ATmega325__) \
1274|| defined(__AVR_ATmega325A__) \
1275|| defined(__AVR_ATmega325PA__) \
1276|| defined(__AVR_ATmega3250__) \
1277|| defined(__AVR_ATmega3250A__) \
1278|| defined(__AVR_ATmega3250PA__) \
1279|| defined(__AVR_ATmega328__) \
1280|| defined(__AVR_ATmega328P__) \
1281|| defined(__AVR_ATmega328PB__) \
1282|| defined(__AVR_ATmega329__) \
1283|| defined(__AVR_ATmega329A__) \
1284|| defined(__AVR_ATmega329P__) \
1285|| defined(__AVR_ATmega329PA__) \
1286|| defined(__AVR_ATmega3290__) \
1287|| defined(__AVR_ATmega3290A__) \
1288|| defined(__AVR_ATmega3290P__) \
1289|| defined(__AVR_ATmega3290PA__) \
1290|| defined(__AVR_ATmega32C1__) \
1291|| defined(__AVR_ATmega32M1__) \
1292|| defined(__AVR_ATmega32U2__) \
1293|| defined(__AVR_ATmega32U4__) \
1294|| defined(__AVR_ATmega32U6__) \
1295|| defined(__AVR_ATmega48__) \
1296|| defined(__AVR_ATmega48A__) \
1297|| defined(__AVR_ATmega48PA__) \
1298|| defined(__AVR_ATmega48P__) \
1299|| defined(__AVR_ATmega640__) \
1300|| defined(__AVR_ATmega649P__) \
1301|| defined(__AVR_ATmega644__) \
1302|| defined(__AVR_ATmega644A__) \
1303|| defined(__AVR_ATmega644P__) \
1304|| defined(__AVR_ATmega644PA__) \
1305|| defined(__AVR_ATmega645__) \
1306|| defined(__AVR_ATmega645A__) \
1307|| defined(__AVR_ATmega645P__) \
1308|| defined(__AVR_ATmega6450__) \
1309|| defined(__AVR_ATmega6450A__) \
1310|| defined(__AVR_ATmega6450P__) \
1311|| defined(__AVR_ATmega649__) \
1312|| defined(__AVR_ATmega649A__) \
1313|| defined(__AVR_ATmega64M1__) \
1314|| defined(__AVR_ATmega64C1__) \
1315|| defined(__AVR_ATmega6490__) \
1316|| defined(__AVR_ATmega6490A__) \
1317|| defined(__AVR_ATmega6490P__) \
1318|| defined(__AVR_ATmega644RFR2__) \
1319|| defined(__AVR_ATmega64RFR2__) \
1320|| defined(__AVR_ATmega88__) \
1321|| defined(__AVR_ATmega88A__) \
1322|| defined(__AVR_ATmega88P__) \
1323|| defined(__AVR_ATmega88PA__) \
1324|| defined(__AVR_ATmega8U2__) \
1325|| defined(__AVR_ATmega16U2__) \
1326|| defined(__AVR_ATmega32U2__) \
1327|| defined(__AVR_ATtiny48__) \
1328|| defined(__AVR_ATtiny88__) \
1329|| defined(__AVR_ATtiny87__) \
1330|| defined(__AVR_ATtiny167__)
1395#if defined(__AVR_ATmega128RFA1__) \
1396|| defined(__AVR_ATmega2564RFR2__) \
1397|| defined(__AVR_ATmega1284RFR2__) \
1398|| defined(__AVR_ATmega644RFR2__) \
1399|| defined(__AVR_ATmega256RFR2__) \
1400|| defined(__AVR_ATmega128RFR2__) \
1401|| defined(__AVR_ATmega64RFR2__)
1402 , clock_div_1_rc = 15
1425 __asm__ __volatile__ (
1426 "in __tmp_reg__,__SREG__" "\n\t"
1430 "out __SREG__, __tmp_reg__"
1433 "M" (_SFR_MEM_ADDR(CLKPR)),
1447#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1449#elif defined(__AVR_ATmega16HVB__) \
1450|| defined(__AVR_ATmega16HVBREVB__) \
1451|| defined(__AVR_ATmega32HVB__) \
1452|| defined(__AVR_ATmega32HVBREVB__)
1467 __asm__ __volatile__ (
1468 "in __tmp_reg__,__SREG__" "\n\t"
1472 "out __SREG__, __tmp_reg__"
1475 "M" (_SFR_MEM_ADDR(CLKPR)),
1480#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)))
1482#elif defined(__AVR_ATA5790__) \
1483|| defined (__AVR_ATA5795__)
1497static __ATTR_ALWAYS_INLINE__
void system_clock_prescale_set(clock_div_t);
1499void system_clock_prescale_set(clock_div_t __x)
1502 __asm__ __volatile__ (
1503 "in __tmp_reg__,__SREG__" "\n\t"
1507 "out __SREG__, __tmp_reg__"
1510 "I" (_SFR_IO_ADDR(CLKPR)),
1515#define system_clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
1519 timer_clock_div_reset = 0,
1520 timer_clock_div_1 = 1,
1521 timer_clock_div_2 = 2,
1522 timer_clock_div_4 = 3,
1523 timer_clock_div_8 = 4,
1524 timer_clock_div_16 = 5,
1525 timer_clock_div_32 = 6,
1526 timer_clock_div_64 = 7
1529static __ATTR_ALWAYS_INLINE__
void timer_clock_prescale_set(timer_clock_div_t);
1531void timer_clock_prescale_set(timer_clock_div_t __x)
1534 __asm__ __volatile__ (
1535 "in __tmp_reg__,__SREG__" "\n\t"
1537 "in %[temp],%[clkpr]" "\n\t"
1538 "out %[clkpr],%[enable]" "\n\t"
1539 "andi %[temp],%[not_CLTPS]" "\n\t"
1540 "or %[temp], %[set_value]" "\n\t"
1541 "out %[clkpr],%[temp]" "\n\t"
1542 "out __SREG__,__tmp_reg__"
1544 : [clkpr]
"I" (_SFR_IO_ADDR(CLKPR)),
1545 [enable]
"r" (
_BV(CLKPCE)),
1546 [not_CLTPS]
"M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
1547 [set_value]
"r" ((__x & 7) << 3)
1551#define timer_clock_prescale_get() (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
1553#elif defined(__AVR_ATA6285__) \
1554|| defined(__AVR_ATA6286__)
1568static __ATTR_ALWAYS_INLINE__
void system_clock_prescale_set(clock_div_t);
1570void system_clock_prescale_set(clock_div_t __x)
1573 __asm__ __volatile__ (
1574 "in __tmp_reg__,__SREG__" "\n\t"
1576 "in %[temp],%[clpr]" "\n\t"
1577 "out %[clpr],%[enable]" "\n\t"
1578 "andi %[temp],%[not_CLKPS]" "\n\t"
1579 "or %[temp], %[set_value]" "\n\t"
1580 "out %[clpr],%[temp]" "\n\t"
1581 "out __SREG__,__tmp_reg__"
1583 : [clpr]
"I" (_SFR_IO_ADDR(CLKPR)),
1584 [enable]
"r" _BV(CLPCE),
1585 [not_CLKPS]
"M" (0xFF & (~ ((1 << CLKPS2) | (1 << CLKPS1) | (1 << CLKPS0)))),
1586 [set_value]
"r" (__x & 7)
1590#define system_clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
1594 timer_clock_div_reset = 0,
1595 timer_clock_div_1 = 1,
1596 timer_clock_div_2 = 2,
1597 timer_clock_div_4 = 3,
1598 timer_clock_div_8 = 4,
1599 timer_clock_div_16 = 5,
1600 timer_clock_div_32 = 6,
1601 timer_clock_div_64 = 7
1604static __ATTR_ALWAYS_INLINE__
void timer_clock_prescale_set(timer_clock_div_t);
1606void timer_clock_prescale_set(timer_clock_div_t __x)
1609 __asm__ __volatile__ (
1610 "in __tmp_reg__,__SREG__" "\n\t"
1612 "in %[temp],%[clpr]" "\n\t"
1613 "out %[clpr],%[enable]" "\n\t"
1614 "andi %[temp],%[not_CLTPS]" "\n\t"
1615 "or %[temp], %[set_value]" "\n\t"
1616 "out %[clpr],%[temp]" "\n\t"
1617 "out __SREG__,__tmp_reg__"
1619 : [clpr]
"I" (_SFR_IO_ADDR(CLKPR)),
1620 [enable]
"r" (
_BV(CLPCE)),
1621 [not_CLTPS]
"M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
1622 [set_value]
"r" ((__x & 7) << 3)
1626#define timer_clock_prescale_get() (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
1628#elif defined(__AVR_ATtiny24__) \
1629|| defined(__AVR_ATtiny24A__) \
1630|| defined(__AVR_ATtiny44__) \
1631|| defined(__AVR_ATtiny44A__) \
1632|| defined(__AVR_ATtiny84__) \
1633|| defined(__AVR_ATtiny84A__) \
1634|| defined(__AVR_ATtiny25__) \
1635|| defined(__AVR_ATtiny45__) \
1636|| defined(__AVR_ATtiny85__) \
1637|| defined(__AVR_ATtiny261A__) \
1638|| defined(__AVR_ATtiny261__) \
1639|| defined(__AVR_ATtiny461__) \
1640|| defined(__AVR_ATtiny461A__) \
1641|| defined(__AVR_ATtiny861__) \
1642|| defined(__AVR_ATtiny861A__) \
1643|| defined(__AVR_ATtiny2313__) \
1644|| defined(__AVR_ATtiny2313A__) \
1645|| defined(__AVR_ATtiny4313__) \
1646|| defined(__AVR_ATtiny13__) \
1647|| defined(__AVR_ATtiny13A__) \
1648|| defined(__AVR_ATtiny43U__) \
1668 __asm__ __volatile__ (
1669 "in __tmp_reg__,__SREG__" "\n\t"
1673 "out __SREG__, __tmp_reg__"
1676 "I" (_SFR_IO_ADDR(CLKPR)),
1682#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1684#elif defined(__AVR_ATtiny441__) \
1685|| defined(__AVR_ATtiny841__)
1704 __asm__ __volatile__ (
1705 "in __tmp_reg__,__SREG__" "\n\t"
1709 "out __SREG__, __tmp_reg__"
1712 "n" (_SFR_MEM_ADDR(CLKPR)),
1713 "n" (_SFR_MEM_ADDR(CCP)),
1718#define clock_prescale_get() (clock_div_t) (CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1720#elif defined(__AVR_ATmega64__) \
1721|| defined(__AVR_ATmega103__) \
1722|| defined(__AVR_ATmega128__)
1741 if((__x <= 0) || (__x > 129))
1758 __asm__ __volatile__ (
1759 "in __tmp_reg__,__SREG__" "\n\t"
1761 "out %2, __zero_reg__" "\n\t"
1770 "cpi %1, 0x01" "\n\t"
1772 "ldi %0, 0x81" "\n\t"
1774 "ori %0, 0x80" "\n\t"
1784 "L_%=: " "out __SREG__, __tmp_reg__"
1787 "I" (_SFR_IO_ADDR(XDIV))
1802 return (clock_div_t) (129 - (XDIV & 0x7F));
1806#elif defined(__AVR_ATtiny4__) \
1807|| defined(__AVR_ATtiny5__) \
1808|| defined(__AVR_ATtiny9__) \
1809|| defined(__AVR_ATtiny10__) \
1810|| defined(__AVR_ATtiny102__) \
1811|| defined(__AVR_ATtiny104__) \
1812|| defined(__AVR_ATtiny20__) \
1813|| defined(__AVR_ATtiny40__) \
1833 __asm__ __volatile__ (
1834 "in __tmp_reg__,__SREG__" "\n\t"
1838 "out __SREG__, __tmp_reg__"
1841 "I" (_SFR_IO_ADDR(CCP)),
1842 "I" (_SFR_IO_ADDR(CLKPSR)),
1847#define clock_prescale_get() (clock_div_t)(CLKPSR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
#define clock_prescale_get()
Definition: power.h:1447
static void power_all_enable()
static void power_all_disable()
void clock_prescale_set(clock_div_t __x)
Definition: power.h:1422
#define _BV(bit)
Definition: sfr_defs.h:208
#define bit_is_clear(sfr, bit)
Definition: sfr_defs.h:245
unsigned char uint8_t
Definition: stdint.h:83