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A simple project

At this point, you should have the GNU tools configured, built, and installed on your system. In this chapter, we present a simple example of using the GNU tools in an AVR project. After reading this chapter, you should have a better feel as to how the tools are used and how a Makefile can be configured.

The Project

This project will use the pulse-width modulator (PWM) to ramp an LED on and off every two seconds. An AT90S2313 processor will be used as the controller. The circuit for this demonstration is shown in the schematic diagram. If you have a development kit, you should be able to use it, rather than build the circuit, for this project.

Note
Meanwhile, the AT90S2313 became obsolete. Either use its successor, the (pin-compatible) ATtiny2313 for the project, or perhaps the ATmega8 or one of its successors (ATmega48/88/168) which have become quite popular since the original demo project had been established. For all these more modern devices, it is no longer necessary to use an external crystal for clocking as they ship with the internal 1 MHz oscillator enabled, so C1, C2, and Q1 can be omitted. Normally, for this experiment, the external circuitry on /RESET (R1, C3) can be omitted as well, leaving only the AVR, the LED, the bypass capacitor C4, and perhaps R2. For the ATmega8/48/88/168, use PB1 (pin 15 at the DIP-28 package) to connect the LED to. Additionally, this demo has been ported to many different other AVRs. The location of the respective OC pin varies between different AVRs, and it is mandated by the AVR hardware.

demo.png
Schematic of circuit for demo project

The source code is given in demo.c. For the sake of this example, create a file called demo.c containing this source code. Some of the more important parts of the code are:

Note [1]:
As the AVR microcontroller series has been developed during the past years, new features have been added over time. Even though the basic concepts of the timer/counter1 are still the same as they used to be back in early 2001 when this simple demo was written initially, the names of registers and bits have been changed slightly to reflect the new features. Also, the port and pin mapping of the output compare match 1A (or 1 for older devices) pin which is used to control the LED varies between different AVRs. The file iocompat.h tries to abstract between all this differences using some preprocessor #ifdef statements, so the actual program itself can operate on a common set of symbolic names. The macros defined by that file are:
Note [2]:
ISR() is a macro that marks the function as an interrupt routine. In this case, the function will get called when timer 1 overflows. Setting up interrupts is explained in greater detail in <avr/interrupt.h>: Interrupts.
Note [3]:
The PWM is being used in 10-bit mode, so we need a 16-bit variable to remember the current value.
Note [4]:
This section determines the new value of the PWM.
Note [5]:
Here's where the newly computed value is loaded into the PWM register. Since we are in an interrupt routine, it is safe to use a 16-bit assignment to the register. Outside of an interrupt, the assignment should only be performed with interrupts disabled if there's a chance that an interrupt routine could also access this register (or another register that uses TEMP), see the appropriate FAQ entry.
Note [6]:
This routine gets called after a reset. It initializes the PWM and enables interrupts.
Note [7]:
The main loop of the program does nothing – all the work is done by the interrupt routine! The sleep_mode() puts the processor on sleep until the next interrupt, to conserve power. Of course, that probably won't be noticable as we are still driving a LED, it is merely mentioned here to demonstrate the basic principle.
Note [8]:
Early AVR devices saturate their outputs at rather low currents when sourcing current, so the LED can be connected directly, the resulting current through the LED will be about 15 mA. For modern parts (at least for the ATmega 128), however Atmel has drastically increased the IO source capability, so when operating at 5 V Vcc, R2 is needed. Its value should be about 150 Ohms. When operating the circuit at 3 V, it can still be omitted though.

The Source Code

/*
* ----------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <joerg@FreeBSD.ORG> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a beer in return. Joerg Wunsch
* ----------------------------------------------------------------------------
*
* Simple AVR demonstration. Controls a LED that can be directly
* connected from OC1/OC1A to GND. The brightness of the LED is
* controlled with the PWM. After each period of the PWM, the PWM
* value is either incremented or decremented, that's all.
*
* $Id: demo.c 1637 2008-03-17 21:49:41Z joerg_wunsch $
*/
#include <inttypes.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/sleep.h>
#include "iocompat.h" /* Note [1] */
enum { UP, DOWN };
ISR (TIMER1_OVF_vect) /* Note [2] */
{
static uint16_t pwm; /* Note [3] */
static uint8_t direction;
switch (direction) /* Note [4] */
{
case UP:
if (++pwm == TIMER1_TOP)
direction = DOWN;
break;
case DOWN:
if (--pwm == 0)
direction = UP;
break;
}
OCR = pwm; /* Note [5] */
}
void
ioinit (void) /* Note [6] */
{
/* Timer 1 is 10-bit PWM (8-bit PWM on some ATtinys). */
TCCR1A = TIMER1_PWM_INIT;
/*
* Start timer 1.
*
* NB: TCCR1A and TCCR1B could actually be the same register, so
* take care to not clobber it.
*/
TCCR1B |= TIMER1_CLOCKSOURCE;
/*
* Run any device-dependent timer 1 setup hook if present.
*/
#if defined(TIMER1_SETUP_HOOK)
TIMER1_SETUP_HOOK();
#endif
/* Set PWM value to 0. */
OCR = 0;
/* Enable OC1 as output. */
DDROC = _BV (OC1);
/* Enable timer 1 overflow interrupt. */
TIMSK = _BV (TOIE1);
sei ();
}
int
main (void)
{
ioinit ();
/* loop forever, the interrupts are doing the rest */
for (;;) /* Note [7] */
sleep_mode();
return (0);
}

Compiling and Linking

This first thing that needs to be done is compile the source. When compiling, the compiler needs to know the processor type so the -mmcu option is specified. The -Os option will tell the compiler to optimize the code for efficient space usage (at the possible expense of code execution speed). The -g is used to embed debug info. The debug info is useful for disassemblies and doesn't end up in the .hex files, so I usually specify it. Finally, the -c tells the compiler to compile and stop – don't link. This demo is small enough that we could compile and link in one step. However, real-world projects will have several modules and will typically need to break up the building of the project into several compiles and one link.

    $ avr-gcc -g -Os -mmcu=atmega8 -c demo.c

The compilation will create a demo.o file. Next we link it into a binary called demo.elf.

    $ avr-gcc -g -mmcu=atmega8 -o demo.elf demo.o

It is important to specify the MCU type when linking. The compiler uses the -mmcu option to choose start-up files and run-time libraries that get linked together. If this option isn't specified, the compiler defaults to the 8515 processor environment, which is most certainly what you didn't want.

Examining the Object File

Now we have a binary file. Can we do anything useful with it (besides put it into the processor?) The GNU Binutils suite is made up of many useful tools for manipulating object files that get generated. One tool is avr-objdump, which takes information from the object file and displays it in many useful ways. Typing the command by itself will cause it to list out its options.

For instance, to get a feel of the application's size, the -h option can be used. The output of this option shows how much space is used in each of the sections (the .stab and .stabstr sections hold the debugging information and won't make it into the ROM file).

An even more useful option is -S. This option disassembles the binary file and intersperses the source code in the output! This method is much better, in my opinion, than using the -S with the compiler because this listing includes routines from the libraries and the vector table contents. Also, all the "fix-ups" have been satisfied. In other words, the listing generated by this option reflects the actual code that the processor will run.

    $ avr-objdump -h -S demo.elf > demo.lst

Here's the output as saved in the demo.lst file:

demo.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         00000110  00000000  00000000  00000094  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         00000000  00800060  00000110  000001a4  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  2 .bss          00000003  00800060  00800060  000001a4  2**0
                  ALLOC
  3 .stab         00000744  00000000  00000000  000001a4  2**2
                  CONTENTS, READONLY, DEBUGGING
  4 .stabstr      00000c4b  00000000  00000000  000008e8  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .comment      00000011  00000000  00000000  00001533  2**0
                  CONTENTS, READONLY
  6 .debug_info   0000048c  00000000  00000000  00001544  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_abbrev 0000044e  00000000  00000000  000019d0  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_line   0000001d  00000000  00000000  00001e1e  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_str    0000017a  00000000  00000000  00001e3b  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

00000000 <__vectors>:
   0:	12 c0       	rjmp	.+36     	; 0x26 <__ctors_end>
   2:	6d c0       	rjmp	.+218    	; 0xde <__bad_interrupt>
   4:	6c c0       	rjmp	.+216    	; 0xde <__bad_interrupt>
   6:	6b c0       	rjmp	.+214    	; 0xde <__bad_interrupt>
   8:	6a c0       	rjmp	.+212    	; 0xde <__bad_interrupt>
   a:	69 c0       	rjmp	.+210    	; 0xde <__bad_interrupt>
   c:	68 c0       	rjmp	.+208    	; 0xde <__bad_interrupt>
   e:	67 c0       	rjmp	.+206    	; 0xde <__bad_interrupt>
  10:	1a c0       	rjmp	.+52     	; 0x46 <__vector_8>
  12:	65 c0       	rjmp	.+202    	; 0xde <__bad_interrupt>
  14:	64 c0       	rjmp	.+200    	; 0xde <__bad_interrupt>
  16:	63 c0       	rjmp	.+198    	; 0xde <__bad_interrupt>
  18:	62 c0       	rjmp	.+196    	; 0xde <__bad_interrupt>
  1a:	61 c0       	rjmp	.+194    	; 0xde <__bad_interrupt>
  1c:	60 c0       	rjmp	.+192    	; 0xde <__bad_interrupt>
  1e:	5f c0       	rjmp	.+190    	; 0xde <__bad_interrupt>
  20:	5e c0       	rjmp	.+188    	; 0xde <__bad_interrupt>
  22:	5d c0       	rjmp	.+186    	; 0xde <__bad_interrupt>
  24:	5c c0       	rjmp	.+184    	; 0xde <__bad_interrupt>

00000026 <__ctors_end>:
  26:	11 24       	eor	r1, r1
  28:	1f be       	out	0x3f, r1	; 63
  2a:	cf e5       	ldi	r28, 0x5F	; 95
  2c:	d4 e0       	ldi	r29, 0x04	; 4
  2e:	de bf       	out	0x3e, r29	; 62
  30:	cd bf       	out	0x3d, r28	; 61

00000032 <__do_clear_bss>:
  32:	10 e0       	ldi	r17, 0x00	; 0
  34:	a0 e6       	ldi	r26, 0x60	; 96
  36:	b0 e0       	ldi	r27, 0x00	; 0
  38:	01 c0       	rjmp	.+2      	; 0x3c <.do_clear_bss_start>

0000003a <.do_clear_bss_loop>:
  3a:	1d 92       	st	X+, r1

0000003c <.do_clear_bss_start>:
  3c:	a3 36       	cpi	r26, 0x63	; 99
  3e:	b1 07       	cpc	r27, r17
  40:	e1 f7       	brne	.-8      	; 0x3a <.do_clear_bss_loop>
  42:	4e d0       	rcall	.+156    	; 0xe0 <main>
  44:	61 c0       	rjmp	.+194    	; 0x108 <exit>

00000046 <__vector_8>:
#include "iocompat.h"		/* Note [1] */

enum { UP, DOWN };

ISR (TIMER1_OVF_vect)		/* Note [2] */
{
  46:	1f 92       	push	r1
  48:	0f 92       	push	r0
  4a:	0f b6       	in	r0, 0x3f	; 63
  4c:	0f 92       	push	r0
  4e:	11 24       	eor	r1, r1
  50:	2f 93       	push	r18
  52:	8f 93       	push	r24
  54:	9f 93       	push	r25
    static uint16_t pwm;	/* Note [3] */
    static uint8_t direction;

    switch (direction)		/* Note [4] */
  56:	80 91 62 00 	lds	r24, 0x0062
  5a:	88 23       	and	r24, r24
  5c:	01 f1       	breq	.+64     	; 0x9e <__vector_8+0x58>
  5e:	81 30       	cpi	r24, 0x01	; 1
  60:	81 f4       	brne	.+32     	; 0x82 <__vector_8+0x3c>
            if (++pwm == TIMER1_TOP)
                direction = DOWN;
            break;

        case DOWN:
            if (--pwm == 0)
  62:	80 91 60 00 	lds	r24, 0x0060
  66:	90 91 61 00 	lds	r25, 0x0061
  6a:	01 97       	sbiw	r24, 0x01	; 1
  6c:	90 93 61 00 	sts	0x0061, r25
  70:	80 93 60 00 	sts	0x0060, r24
  74:	00 97       	sbiw	r24, 0x00	; 0
  76:	49 f4       	brne	.+18     	; 0x8a <__vector_8+0x44>
                direction = UP;
  78:	10 92 62 00 	sts	0x0062, r1
  7c:	80 e0       	ldi	r24, 0x00	; 0
  7e:	90 e0       	ldi	r25, 0x00	; 0
  80:	04 c0       	rjmp	.+8      	; 0x8a <__vector_8+0x44>
  82:	80 91 60 00 	lds	r24, 0x0060
  86:	90 91 61 00 	lds	r25, 0x0061
            break;
    }

    OCR = pwm;			/* Note [5] */
  8a:	9b bd       	out	0x2b, r25	; 43
  8c:	8a bd       	out	0x2a, r24	; 42
}
  8e:	9f 91       	pop	r25
  90:	8f 91       	pop	r24
  92:	2f 91       	pop	r18
  94:	0f 90       	pop	r0
  96:	0f be       	out	0x3f, r0	; 63
  98:	0f 90       	pop	r0
  9a:	1f 90       	pop	r1
  9c:	18 95       	reti
    static uint8_t direction;

    switch (direction)		/* Note [4] */
    {
        case UP:
            if (++pwm == TIMER1_TOP)
  9e:	80 91 60 00 	lds	r24, 0x0060
  a2:	90 91 61 00 	lds	r25, 0x0061
  a6:	01 96       	adiw	r24, 0x01	; 1
  a8:	90 93 61 00 	sts	0x0061, r25
  ac:	80 93 60 00 	sts	0x0060, r24
  b0:	8f 3f       	cpi	r24, 0xFF	; 255
  b2:	23 e0       	ldi	r18, 0x03	; 3
  b4:	92 07       	cpc	r25, r18
  b6:	49 f7       	brne	.-46     	; 0x8a <__vector_8+0x44>
                direction = DOWN;
  b8:	81 e0       	ldi	r24, 0x01	; 1
  ba:	80 93 62 00 	sts	0x0062, r24
  be:	8f ef       	ldi	r24, 0xFF	; 255
  c0:	93 e0       	ldi	r25, 0x03	; 3
  c2:	e3 cf       	rjmp	.-58     	; 0x8a <__vector_8+0x44>

000000c4 <ioinit>:

void
ioinit (void)			/* Note [6] */
{
    /* Timer 1 is 10-bit PWM (8-bit PWM on some ATtinys). */
    TCCR1A = TIMER1_PWM_INIT;
  c4:	83 e8       	ldi	r24, 0x83	; 131
  c6:	8f bd       	out	0x2f, r24	; 47
     * Start timer 1.
     *
     * NB: TCCR1A and TCCR1B could actually be the same register, so
     * take care to not clobber it.
     */
    TCCR1B |= TIMER1_CLOCKSOURCE;
  c8:	8e b5       	in	r24, 0x2e	; 46
  ca:	81 60       	ori	r24, 0x01	; 1
  cc:	8e bd       	out	0x2e, r24	; 46
#if defined(TIMER1_SETUP_HOOK)
    TIMER1_SETUP_HOOK();
#endif

    /* Set PWM value to 0. */
    OCR = 0;
  ce:	1b bc       	out	0x2b, r1	; 43
  d0:	1a bc       	out	0x2a, r1	; 42

    /* Enable OC1 as output. */
    DDROC = _BV (OC1);
  d2:	82 e0       	ldi	r24, 0x02	; 2
  d4:	87 bb       	out	0x17, r24	; 23

    /* Enable timer 1 overflow interrupt. */
    TIMSK = _BV (TOIE1);
  d6:	84 e0       	ldi	r24, 0x04	; 4
  d8:	89 bf       	out	0x39, r24	; 57
    sei ();
  da:	78 94       	sei
  dc:	08 95       	ret

000000de <__bad_interrupt>:
  de:	90 cf       	rjmp	.-224    	; 0x0 <__vectors>

000000e0 <main>:

void
ioinit (void)			/* Note [6] */
{
    /* Timer 1 is 10-bit PWM (8-bit PWM on some ATtinys). */
    TCCR1A = TIMER1_PWM_INIT;
  e0:	83 e8       	ldi	r24, 0x83	; 131
  e2:	8f bd       	out	0x2f, r24	; 47
     * Start timer 1.
     *
     * NB: TCCR1A and TCCR1B could actually be the same register, so
     * take care to not clobber it.
     */
    TCCR1B |= TIMER1_CLOCKSOURCE;
  e4:	8e b5       	in	r24, 0x2e	; 46
  e6:	81 60       	ori	r24, 0x01	; 1
  e8:	8e bd       	out	0x2e, r24	; 46
#if defined(TIMER1_SETUP_HOOK)
    TIMER1_SETUP_HOOK();
#endif

    /* Set PWM value to 0. */
    OCR = 0;
  ea:	1b bc       	out	0x2b, r1	; 43
  ec:	1a bc       	out	0x2a, r1	; 42

    /* Enable OC1 as output. */
    DDROC = _BV (OC1);
  ee:	82 e0       	ldi	r24, 0x02	; 2
  f0:	87 bb       	out	0x17, r24	; 23

    /* Enable timer 1 overflow interrupt. */
    TIMSK = _BV (TOIE1);
  f2:	84 e0       	ldi	r24, 0x04	; 4
  f4:	89 bf       	out	0x39, r24	; 57
    sei ();
  f6:	78 94       	sei
    ioinit ();

    /* loop forever, the interrupts are doing the rest */

    for (;;)			/* Note [7] */
        sleep_mode();
  f8:	85 b7       	in	r24, 0x35	; 53
  fa:	80 68       	ori	r24, 0x80	; 128
  fc:	85 bf       	out	0x35, r24	; 53
  fe:	88 95       	sleep
 100:	85 b7       	in	r24, 0x35	; 53
 102:	8f 77       	andi	r24, 0x7F	; 127
 104:	85 bf       	out	0x35, r24	; 53
 106:	f8 cf       	rjmp	.-16     	; 0xf8 <main+0x18>

00000108 <exit>:
 108:	f8 94       	cli
 10a:	00 c0       	rjmp	.+0      	; 0x10c <_exit>

0000010c <_exit>:
 10c:	f8 94       	cli

0000010e <__stop_program>:
 10e:	ff cf       	rjmp	.-2      	; 0x10e <__stop_program>

Linker Map Files

avr-objdump is very useful, but sometimes it's necessary to see information about the link that can only be generated by the linker. A map file contains this information. A map file is useful for monitoring the sizes of your code and data. It also shows where modules are loaded and which modules were loaded from libraries. It is yet another view of your application. To get a map file, I usually add -Wl,-Map,demo.map to my link command. Relink the application using the following command to generate demo.map (a portion of which is shown below).

    $ avr-gcc -g -mmcu=atmega8 -Wl,-Map,demo.map -o demo.elf demo.o

Some points of interest in the demo.map file are:

.rela.plt
*(.rela.plt)
.text 0x0000000000000000 0x110
*(.vectors)
.vectors 0x0000000000000000 0x26 /tmp/avr-libc-1_8_1-release/avr/lib/avr4/atmega8/crtm8.o
0x0000000000000000 __vectors
0x0000000000000000 __vector_default
*(.vectors)
*(.progmem.gcc*)
0x0000000000000026 . = ALIGN (0x2)
0x0000000000000026 __trampolines_start = .
*(.trampolines)
.trampolines 0x0000000000000026 0x0 linker stubs
*(.trampolines*)
0x0000000000000026 __trampolines_end = .
*(.progmem*)
0x0000000000000026 . = ALIGN (0x2)
*(.jumptables)
*(.jumptables*)
*(.lowtext)
*(.lowtext*)
0x0000000000000026 __ctors_start = .

The .text segment (where program instructions are stored) starts at location 0x0.

*(.fini2)
*(.fini2)
*(.fini1)
*(.fini1)
*(.fini0)
.fini0 0x000000000000010c 0x4 /usr/local/lib/gcc/avr/4.8.3/avr4/libgcc.a(_exit.o)
*(.fini0)
0x0000000000000110 _etext = .
.data 0x0000000000800060 0x0 load address 0x0000000000000110
0x0000000000800060 PROVIDE (__data_start, .)
*(.data)
.data 0x0000000000800060 0x0 demo.o
.data 0x0000000000800060 0x0 /tmp/avr-libc-1_8_1-release/avr/lib/avr4/atmega8/crtm8.o
.data 0x0000000000800060 0x0 /tmp/avr-libc-1_8_1-release/avr/lib/avr4/exit.o
.data 0x0000000000800060 0x0 /usr/local/lib/gcc/avr/4.8.3/avr4/libgcc.a(_exit.o)
.data 0x0000000000800060 0x0 /usr/local/lib/gcc/avr/4.8.3/avr4/libgcc.a(_clear_bss.o)
*(.data*)
*(.rodata)
*(.rodata*)
*(.gnu.linkonce.d*)
0x0000000000800060 . = ALIGN (0x2)
0x0000000000800060 _edata = .
0x0000000000800060 PROVIDE (__data_end, .)
.bss 0x0000000000800060 0x3
0x0000000000800060 PROVIDE (__bss_start, .)
*(.bss)
.bss 0x0000000000800060 0x3 demo.o
.bss 0x0000000000800063 0x0 /tmp/avr-libc-1_8_1-release/avr/lib/avr4/atmega8/crtm8.o
.bss 0x0000000000800063 0x0 /tmp/avr-libc-1_8_1-release/avr/lib/avr4/exit.o
.bss 0x0000000000800063 0x0 /usr/local/lib/gcc/avr/4.8.3/avr4/libgcc.a(_exit.o)
.bss 0x0000000000800063 0x0 /usr/local/lib/gcc/avr/4.8.3/avr4/libgcc.a(_clear_bss.o)
*(.bss*)
*(COMMON)
0x0000000000800063 PROVIDE (__bss_end, .)
0x0000000000000110 __data_load_start = LOADADDR (.data)
0x0000000000000110 __data_load_end = (__data_load_start + SIZEOF (.data))
.noinit 0x0000000000800063 0x0
0x0000000000800063 PROVIDE (__noinit_start, .)
*(.noinit*)
0x0000000000800063 PROVIDE (__noinit_end, .)
0x0000000000800063 _end = .
0x0000000000800063 PROVIDE (__heap_start, .)
.eeprom 0x0000000000810000 0x0
*(.eeprom*)
0x0000000000810000 __eeprom_end = .

The last address in the .text segment is location 0x114 ( denoted by _etext ), so the instructions use up 276 bytes of FLASH.

The .data segment (where initialized static variables are stored) starts at location 0x60, which is the first address after the register bank on an ATmega8 processor.

The next available address in the .data segment is also location 0x60, so the application has no initialized data.

The .bss segment (where uninitialized data is stored) starts at location 0x60.

The next available address in the .bss segment is location 0x63, so the application uses 3 bytes of uninitialized data.

The .eeprom segment (where EEPROM variables are stored) starts at location 0x0.

The next available address in the .eeprom segment is also location 0x0, so there aren't any EEPROM variables.

Generating Intel Hex Files

We have a binary of the application, but how do we get it into the processor? Most (if not all) programmers will not accept a GNU executable as an input file, so we need to do a little more processing. The next step is to extract portions of the binary and save the information into .hex files. The GNU utility that does this is called avr-objcopy.

The ROM contents can be pulled from our project's binary and put into the file demo.hex using the following command:

    $ avr-objcopy -j .text -j .data -O ihex demo.elf demo.hex

The resulting demo.hex file contains:

:1000000012C06DC06CC06BC06AC069C068C067C0F8
:100010001AC065C064C063C062C061C060C05FC018
:100020005EC05DC05CC011241FBECFE5D4E0DEBF62
:10003000CDBF10E0A0E6B0E001C01D92A336B1072D
:10004000E1F74ED061C01F920F920FB60F921124AC
:100050002F938F939F9380916200882301F18130C9
:1000600081F480916000909161000197909361000C
:1000700080936000009749F41092620080E090E065
:1000800004C080916000909161009BBD8ABD9F91EA
:100090008F912F910F900FBE0F901F901895809108
:1000A00060009091610001969093610080936000E0
:1000B0008F3F23E0920749F781E0809362008FEF42
:1000C00093E0E3CF83E88FBD8EB581608EBD1BBC0E
:1000D0001ABC82E087BB84E089BF7894089590CFF2
:1000E00083E88FBD8EB581608EBD1BBC1ABC82E0DB
:1000F00087BB84E089BF789485B7806885BF889581
:1001000085B78F7785BFF8CFF89400C0F894FFCFFC
:00000001FF

The -j option indicates that we want the information from the .text and .data segment extracted. If we specify the EEPROM segment, we can generate a .hex file that can be used to program the EEPROM:

    $ avr-objcopy -j .eeprom --change-section-lma .eeprom=0 -O ihex demo.elf demo_eeprom.hex

There is no demo_eeprom.hex file written, as that file would be empty.

Starting with version 2.17 of the GNU binutils, the avr-objcopy command that used to generate the empty EEPROM files now aborts because of the empty input section .eeprom, so these empty files are not generated. It also signals an error to the Makefile which will be caught there, and makes it print a message about the empty file not being generated.

Letting Make Build the Project

Rather than type these commands over and over, they can all be placed in a make file. To build the demo project using make, save the following in a file called Makefile.

Note
This Makefile can only be used as input for the GNU version of make.
PRG = demo
OBJ = demo.o
#MCU_TARGET = at90s2313
#MCU_TARGET = at90s2333
#MCU_TARGET = at90s4414
#MCU_TARGET = at90s4433
#MCU_TARGET = at90s4434
#MCU_TARGET = at90s8515
#MCU_TARGET = at90s8535
#MCU_TARGET = atmega128
#MCU_TARGET = atmega1280
#MCU_TARGET = atmega1281
#MCU_TARGET = atmega1284p
#MCU_TARGET = atmega16
#MCU_TARGET = atmega163
#MCU_TARGET = atmega164p
#MCU_TARGET = atmega165
#MCU_TARGET = atmega165p
#MCU_TARGET = atmega168
#MCU_TARGET = atmega169
#MCU_TARGET = atmega169p
#MCU_TARGET = atmega2560
#MCU_TARGET = atmega2561
#MCU_TARGET = atmega32
#MCU_TARGET = atmega324p
#MCU_TARGET = atmega325
#MCU_TARGET = atmega3250
#MCU_TARGET = atmega329
#MCU_TARGET = atmega3290
#MCU_TARGET = atmega32u4
#MCU_TARGET = atmega48
#MCU_TARGET = atmega64
#MCU_TARGET = atmega640
#MCU_TARGET = atmega644
#MCU_TARGET = atmega644p
#MCU_TARGET = atmega645
#MCU_TARGET = atmega6450
#MCU_TARGET = atmega649
#MCU_TARGET = atmega6490
MCU_TARGET = atmega8
#MCU_TARGET = atmega8515
#MCU_TARGET = atmega8535
#MCU_TARGET = atmega88
#MCU_TARGET = attiny2313
#MCU_TARGET = attiny24
#MCU_TARGET = attiny25
#MCU_TARGET = attiny26
#MCU_TARGET = attiny261
#MCU_TARGET = attiny44
#MCU_TARGET = attiny45
#MCU_TARGET = attiny461
#MCU_TARGET = attiny84
#MCU_TARGET = attiny85
#MCU_TARGET = attiny861
OPTIMIZE = -O2
DEFS =
LIBS =
# You should not have to change anything below here.
CC = avr-gcc
# Override is only needed by avr-lib build system.
override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) $(DEFS)
override LDFLAGS = -Wl,-Map,$(PRG).map
OBJCOPY = avr-objcopy
OBJDUMP = avr-objdump
all: $(PRG).elf lst text eeprom
$(PRG).elf: $(OBJ)
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS)
# dependency:
demo.o: demo.c iocompat.h
clean:
rm -rf *.o $(PRG).elf *.eps *.png *.pdf *.bak
rm -rf *.lst *.map $(EXTRA_CLEAN_FILES)
lst: $(PRG).lst
%.lst: %.elf
$(OBJDUMP) -h -S $< > $@
# Rules for building the .text rom images
text: hex bin srec
hex: $(PRG).hex
bin: $(PRG).bin
srec: $(PRG).srec
%.hex: %.elf
$(OBJCOPY) -j .text -j .data -O ihex $< $@
%.srec: %.elf
$(OBJCOPY) -j .text -j .data -O srec $< $@
%.bin: %.elf
$(OBJCOPY) -j .text -j .data -O binary $< $@
# Rules for building the .eeprom rom images
eeprom: ehex ebin esrec
ehex: $(PRG)_eeprom.hex
ebin: $(PRG)_eeprom.bin
esrec: $(PRG)_eeprom.srec
%_eeprom.hex: %.elf
$(OBJCOPY) -j .eeprom --change-section-lma .eeprom=0 -O ihex $< $@ \
|| { echo empty $@ not generated; exit 0; }
%_eeprom.srec: %.elf
$(OBJCOPY) -j .eeprom --change-section-lma .eeprom=0 -O srec $< $@ \
|| { echo empty $@ not generated; exit 0; }
%_eeprom.bin: %.elf
$(OBJCOPY) -j .eeprom --change-section-lma .eeprom=0 -O binary $< $@ \
|| { echo empty $@ not generated; exit 0; }
# Every thing below here is used by avr-libc's build system and can be ignored
# by the casual user.
FIG2DEV = fig2dev
EXTRA_CLEAN_FILES = *.hex *.bin *.srec
dox: eps png pdf
eps: $(PRG).eps
png: $(PRG).png
pdf: $(PRG).pdf
%.eps: %.fig
$(FIG2DEV) -L eps $< $@
%.pdf: %.fig
$(FIG2DEV) -L pdf $< $@
%.png: %.fig
$(FIG2DEV) -L png $< $@

Reference to the source code


Automatically generated by Doxygen 1.8.7 on Tue Aug 12 2014.