AVR-LibC
2.3.0git
Standard C library for AVR-GCC
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#define | _NOP() __asm__ __volatile__("nop") |
#define | _MemoryBarrier() __asm__ __volatile__("" ::: "memory") |
Functions | |
void | ccp_write_io (volatile void *__ioaddr, uint8_t __value) |
void | ccp_write_spm (volatile void *__ioaddr, uint8_t __value) |
This header file contains macros that access special functions of the AVR CPU which do not fit into any of the other header files.
#define _MemoryBarrier | ( | ) | __asm__ __volatile__("" ::: "memory") |
Implement a read/write memory barrier. A memory barrier instructs the compiler to not cache any memory data in registers beyond the barrier. This can sometimes be more effective than blocking certain optimizations by declaring some object with a volatile
qualifier.
See Problems with reordering code for things to be taken into account with respect to compiler optimizations.
#define _NOP | ( | ) | __asm__ __volatile__("nop") |
Execute a no operation (NOP) CPU instruction. This should not be used to implement delays, better use the functions from <util/delay_basic.h> or <util/delay.h> for this. For debugging purposes, a NOP can be useful to have an instruction that is guaranteed to be not optimized away by the compiler, so it can always become a breakpoint in the debugger.
void ccp_write_io | ( | volatile void * | __ioaddr, |
uint8_t | __value | ||
) |
Write __value to IO Register Protected (CCP) 8-bit IO register at __ioaddr. See also _PROTECTED_WRITE()
.
void ccp_write_spm | ( | volatile void * | __ioaddr, |
uint8_t | __value | ||
) |
Write __value to SPM Instruction Protected (CCP) 8-bit IO register at __ioaddr. See also _PROTECTED_WRITE_SPM()
.